PowerPC





PowerPC is a RISC microprocessor architecture created by the 1991
Apple-IBM-Motorola alliance, known as AIM. The PowerPC was the CPU portion
of the overall AIM platform, and is the only part to exist to this day.

History

AIM started, as the story goes, when IBM looked about for ways to lower the
cost of the ongoing development and production of their new POWER
architecture. POWER (Performance Optimization With Enhanced RISC) had been
introduced on the RS/6000 and was doing well, but they were interested in a
single-chip version as well as entering other markets.

They approached Apple, who were known to be looking at RISC machines, to see
if they would be interested in the POWER. They were. However they were also
somewhat afraid of being beholden to a company that many considered to be
their archenemy, and demanded a second source for the design. Apple brought
in their long-term supplier, Motorola, who could also bring an extensive set
of embedded customers to the table.

To Motorola, POWER looked like an unbelievable deal. It allowed them to sell
a widely tested and powerful RISC CPU for little design cash on their own
part. It also maintained ties with their largest CPU customer, Apple, and
seemed to offer the possibility of adding another in IBM who might buy
smaller versions from them instead of making their own.

At this point Motorola already had its own RISC design in the form of the
88000 which was doing poorly in the market. One oft-quoted reason for its
failure was the lack of backward compatibility with their own famous 68000
series, also used in the Apple Macintosh.

However the 88000 was already in production, and Apple (among others)
already had machines running on it. If the new POWER single-chip solution
could be made somewhat comparable at a hardware level with the 88000, that
would allow both Apple and Motorola to bring machines to market much faster.
One other major problem was that the 88000 (and all earlier Motorola
designs) were big-endian, whereas the POWER was little-endian.

The result of these various needs and wants was the PowerPC specification.
Everyone seems to have won:

   * IBM got the single-chip CPU they were looking for, largely for free
   * Apple got to use one of the most powerful RISC CPU's on the market, and
     massive press buzz due to IBM's name
   * Motorola got an up-to-date RISC chip for free, one with the potential
     to allow them to sell to many companies, including both Apple and IBM

Design features

The PowerPC is designed along RISC principles, and allows for a superscalar
implementation. Versions of the design exist in both 32-bit and 64-bit
implementations. Starting with the basic POWER specification, the PowerPC added:

   * big or little-endian modes (requiring a reboot)
   * single-precision floating point in addition to double-precision
   * additional floating point instructions at the behest of Apple
   * a complete 64-bit specification, which is backward compatible with the
     32-bit mode
   * removal of some of the more esoteric POWER instructions, which are
     emulated in microcode

Implementations

The first single-chip implementation of the design was the MCP601, a hybrid
of the POWER1 and PowerPC specifications released in 1992. This allowed the
chip to be used by IBM in their existing POWER1 based platforms, although it
also meant some slight pain when switching to the 2nd generation "pure"
PowerPC designs. Apple continued work on a new line of Macintosh computers
based on the chip, and eventually released them as the 601-based Power
Macintosh on March 14th 1994.

IBM also had a full line of PowerPC based desktops built and ready to ship;
unfortunately they did not have an operating system ready. IBM decided to do
a complete rewrite of OS/2 specifically for the PowerPC. Apple, who also
lacked a PowerPC based OS, took a different route. They rewrote the
essential pieces of the operating system and then wrote a 680x0 emulator
which could run the remaining parts of the OS and 68K based applications. It
took IBM 2 years to rewrite OS/2 for PowerPC and by then it was too late.
The IBM PowerPC desktops never shipped. Byte magazine (April 1994) wrote an
extensive article about the Apple and IBM PowerPC desktops.

The second generation was "pure" and included the "low end" 603 and "high
end" 604. The 603 is notable due to its very low cost and power consumption.
This was a deliberate design goal on Motorola's part, who used the 603
project to build the basic core for all future generations of PPC chips.
Apple tried to use the 603 in a new laptop design but was unable to due to
the small 8KB level 1 cache. The 68000 emulator in the Mac OS could not fit
in 8KB and thus slowed the computer drastically. The 603e solved this
problem by having a 16KB L1 cache which alowed the emulator to run
efficiently.

The first 64-bit implementation was the 620, but it appears to have seen
little use. It was later and slower than promised, and IBM used their own
POWER3 design instead, offering no 64-bit "small" solution until the
late-2002 introduction of the PowerPC 970. The 970 is a 64-bit processor
derived from the POWER4 server processor. To create it, the POWER4 core was
modified to be backwards-compatible with 32-bit PowerPC processors, and a
vector unit (similar to the AltiVec extensions in Motorola's 74xx series)
was added.

IBM's RS64 family is a modified PowerPC architecture. These processors are
used in the RS/6000 and AS/400 computer families.

Numerically, the PowerPC is most found in controllers in cars. In this role,
Motorola has offered up a huge number of versions built on the 603 core. To
this they add various bits of custom hardware, to allow for I/O on the
single chip.

PowerPC processors are used in Apple Macintosh, IBM RS/6000 computer, Amiga
acceleration boards, the Nintendo GameCube, and many embedded systems such
as TiVo.

PowerPC processors

   * 601 MPC601 50 and 66 MHz
   * 602 consumer products (multiplexed data/address bus)
   * 603 notebooks
   * 603e
   * 604
   * 604e
   * 620 the first 64-bit implementation
   * x704 BiCOMOS PowerPC implementation by Exponential Technologies
   * 750 G3 (1997) 233 MHz and 266 MHz
   * 7400 G4 (1999) 350 MHz
   * 750FX announced by IBM in 2001 and available early 2002 at 1 GHz.
   * 970 G5 (2003) 64-bit implementation derived from the IBM POWER4 at
     speeds 1.4 GHz, 1.6 GHz, 1.8 GHz, and 2.0 GHz
   * Gekko 485 MHz (used in the Nintendo GameCube)
   * Power4+ IBM 1.4 GHz processor which powers the Regatta (RS/6000 or
     pSeries) servers